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» SMOKS: the memory suits
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HIPEAC
2011
Springer
12 years 7 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
ISCA
2009
IEEE
143views Hardware» more  ISCA 2009»
14 years 2 months ago
Spatio-temporal memory streaming
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...
PLDI
2009
ACM
14 years 8 months ago
Efficiently and precisely locating memory leaks and bloat
Inefficient use of memory, including leaks and bloat, remain a significant challenge for C and C++ developers. Applications with these problems become slower over time as their wo...
Gene Novark, Emery D. Berger, Benjamin G. Zorn
CASES
2006
ACM
14 years 1 months ago
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...
Lan S. Bai, Lei Yang, Robert P. Dick
CODES
2007
IEEE
14 years 1 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas