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SECURWARE
2008
IEEE
14 years 3 months ago
Optimal Trust Network Analysis with Subjective Logic
Trust network analysis with subjective logic (TNA-SL) simplifies complex trust graphs into series-parallel graphs by removing the most uncertain paths to obtain a canonical graph...
Audun Jøsang, Touhid Bhuiyan
DATE
2005
IEEE
132views Hardware» more  DATE 2005»
14 years 2 months ago
Statistical Timing Analysis using Levelized Covariance Propagation
Variability in process parameters is making accurate timing analysis of nano-scale integrated circuits an extremely challenging task. In this paper, we propose a new algorithm for...
Kunhyuk Kang, Bipul Chandra Paul, Kaushik Roy
LCPC
2005
Springer
14 years 2 months ago
Concurrency Analysis for Parallel Programs with Textually Aligned Barriers
Abstract. A fundamental problem in the analysis of parallel programs is to determine when two statements in a program may run concurrently. This analysis is the parallel analog to ...
Amir Kamil, Katherine A. Yelick
ITC
1997
IEEE
94views Hardware» more  ITC 1997»
14 years 1 months ago
Identification of Defective CMOS Devices Using Correlation and Regression Analysis of Frequency Domain Transient Signal Data
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points and on IDD switching transients on the sup...
James F. Plusquellic, Donald M. Chiarulli, Steven ...
WCET
2007
13 years 10 months ago
WCET Analysis: The Annotation Language Challenge
Worst-case execution time (WCET) analysis is indispensable for the successful design and development of systems, which, in addition to their functional constraints, have to satisf...
Raimund Kirner, Jens Knoop, Adrian Prantl, Markus ...