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CCGRID
2011
IEEE
13 years 16 days ago
High Performance Pipelined Process Migration with RDMA
—Coordinated Checkpoint/Restart (C/R) is a widely deployed strategy to achieve fault-tolerance. However, C/R by itself is not capable enough to meet the demands of upcoming exasc...
Xiangyong Ouyang, Raghunath Rajachandrasekar, Xavi...
RTSS
2006
IEEE
14 years 2 months ago
MCGREP - A Predictable Architecture for Embedded Real-Time Systems
Real-time systems design involves many important choices, including that of the processor. The fastest processors achieve performance by utilizing architectural features that make...
Jack Whitham, Neil C. Audsley
PDP
2007
IEEE
14 years 3 months ago
Improving the Development Process for CSE Software
Scientific and engineering programming has been around since the beginning of computing, often being the driving force for new system development and innovation. At the same time...
Michael A. Heroux, James M. Willenbring, Michael N...
CLUSTER
2008
IEEE
14 years 3 months ago
Context-aware address translation for high performance SMP cluster system
—User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface...
Moon-Sang Lee, Joonwon Lee, Seungryoul Maeng
IPPS
2009
IEEE
14 years 3 months ago
Portable builds of HPC applications on diverse target platforms
—High-end machines at modern HPC centers are constantly undergoing hardware and system software upgrades – necessitating frequent rebuilds of application codes. The number of p...
Magdalena Slawiñska, Jaroslaw Slawinski, Va...