63 search results - page 5 / 13 » SPEComp: A New Benchmark Suite for Measuring Parallel Comput... |
PPOPP
2010
ACM
14 years 5 months ago
2010
ACM
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
DEBS
2008
ACM
13 years 9 months ago
2008
ACM
Several new Complex Event Processing (CEP) engines have been recently released, many of which are intended to be used in performance sensitive scenarios - like fraud detection, tr...
EUROPAR
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. This paper presents the XJava compiler for parallel programs. It exploits parallelism based on an object-oriented stream programming paradigm. XJava extends Java with new...
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
VLIW machines possibly provide the most direct way to exploit instruction level parallelism; however, they cannot be used to emulate current general-purpose instruction set archit...