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ERSA
2007
194views Hardware» more  ERSA 2007»
13 years 11 months ago
A Scalable and Reconfigurable Shared-Memory Graphics Cluster Architecture
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
Ross Brennan, Michael Manzke, Keith O'Conor, John ...
IPPS
2008
IEEE
14 years 4 months ago
Lattice Boltzmann simulation optimization on leading multicore platforms
We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of searchbased performance optimizatio...
Samuel Williams, Jonathan Carter, Leonid Oliker, J...
DATE
2007
IEEE
174views Hardware» more  DATE 2007»
14 years 4 months ago
ATLAS: a chip-multiprocessor with transactional memory support
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy T...
NSPW
2006
ACM
14 years 4 months ago
Dark application communities
In considering new security paradigms, it is often worthwhile to anticipate the direction and nature of future attack paradigms. We identify a class of attacks based on the idea o...
Michael E. Locasto, Angelos Stavrou, Angelos D. Ke...
CW
2005
IEEE
14 years 3 months ago
Supporting Presentation Techniques based on Virtual Humans in Educational Virtual Worlds
Educational Virtual Worlds (EVWs) allow one to circumvent physical, safety, and cost constraints that often affect real-world training and learning scenarios. Virtual humans can i...
Luca Chittaro, Lucio Ieronutti, Sara Rigutti