1000 search results - page 17 / 200 » SR-IOV Networking in Xen: Architecture, Design and Implement... |
NOCS
2007
IEEE
14 years 2 months ago
2007
IEEE
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
— This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a sea...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
JSS
2007
13 years 7 months ago
2007
Research into design rationale in the past has focused on argumentation-based design deliberations. These approaches cannot be used to support change impact analysis effectively ...
IPPS
2000
IEEE
14 years 11 days ago
2000
IEEE
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...