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» Sanity Checks in Formal Verification
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ICSE
1999
IEEE-ACM
14 years 3 months ago
A Practical Method for Verifying Event-Driven Software
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
Gerard J. Holzmann, Margaret H. Smith
TCAD
2008
181views more  TCAD 2008»
13 years 10 months ago
A Survey of Automated Techniques for Formal Software Verification
The quality and the correctness of software is often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a design is free of specific...
Vijay D'Silva, Daniel Kroening, Georg Weissenbache...
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
14 years 2 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
SEKE
2010
Springer
13 years 8 months ago
Specification patterns can be formal and still easy
Abstract--Property specification is still one of the most challenging tasks for transference of software verification technology like model checking. The use of patterns has been p...
Fernando Asteasuain, Víctor A. Braberman
IFM
2010
Springer
147views Formal Methods» more  IFM 2010»
13 years 8 months ago
Symbolic Model-Checking of Optimistic Replication Algorithms
Abstract. The Operational Transformation (OT) approach, used in many collaborative editors, allows a group of users to concurrently update replicas of a shared object and exchange ...
Hanifa Boucheneb, Abdessamad Imine, Manal Najem