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ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
13 years 11 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...
SPAA
2010
ACM
14 years 5 days ago
Simplifying concurrent algorithms by exploiting hardware transactional memory
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
Dave Dice, Yossi Lev, Virendra J. Marathe, Mark Mo...
ICCD
2000
IEEE
125views Hardware» more  ICCD 2000»
14 years 4 months ago
Architectural Support for Dynamic Memory Management
Recent advances in software engineering, such as graphical user intevaces and object-oriented programming, have caused applications to become more memory intensive. These applicat...
J. Morris Chang, Witawas Srisa-an, Chia-Tien Dan L...
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
14 years 2 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
DATE
2010
IEEE
184views Hardware» more  DATE 2010»
14 years 14 days ago
Parallel subdivision surface rendering and animation on the Cell BE processor
—Subdivision Surfaces provide a compact way to describe a smooth surface using a mesh model. They are widely used in 3D animation and nearly all modern modeling programs support ...
R. Grottesi, S. Morigi, Martino Ruggiero, Luca Ben...