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ICCS
2005
Springer
15 years 9 months ago
Performance and Scalability Analysis of Cray X1 Vectorization and Multistreaming Optimization
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
Sadaf R. Alam, Jeffrey S. Vetter
HPCA
2006
IEEE
16 years 4 months ago
Store vectors for scalable memory dependence prediction and scheduling
Allowing loads to issue out-of-order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Blindl...
Samantika Subramaniam, Gabriel H. Loh
ARC
2010
Springer
186views Hardware» more  ARC 2010»
15 years 7 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
IPPS
2005
IEEE
15 years 9 months ago
COTS Clusters vs. the Earth Simulator: An Application Study Using IMPACT-3D
In 2002, Japan announced the Earth Simulator—a supercomputer based on low-volume vector processors and a custom network—and reported that computational scientists had used it ...
Daniel G. Chavarría-Miranda, Guohua Jin, Jo...
SC
2005
ACM
15 years 9 months ago
Leading Computational Methods on Scalar and Vector HEC Platforms
The last decade has witnessed a rapid proliferation of superscalar cache-based microprocessors to build high-end computing (HEC) platforms, primarily because of their generality, ...
Leonid Oliker, Jonathan Carter, Michael F. Wehner,...