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DAC
2004
ACM
14 years 9 months ago
Profile-guided microarchitectural floorplanning for deep submicron processor design
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...
IJDSN
2006
146views more  IJDSN 2006»
13 years 8 months ago
Efficient Broadcasting in Self-Organizing Sensor Networks
Multi-hop wireless networks (such as ad-hoc or sensor networks) consist in sets of mobile nodes without the support of a pre-existing fixed infrastructure. For scalability purpose...
Nathalie Mitton, Anthony Busson, Eric Fleury
PVLDB
2010
190views more  PVLDB 2010»
13 years 3 months ago
Efficient B-tree Based Indexing for Cloud Data Processing
A Cloud may be seen as a type of flexible computing infrastructure consisting of many compute nodes, where resizable computing capacities can be provided to different customers. T...
Sai Wu, Dawei Jiang, Beng Chin Ooi, Kun-Lung Wu
ICDE
2008
IEEE
118views Database» more  ICDE 2008»
14 years 10 months ago
XML processing in DHT networks
We study the scalable management of XML data in P2P networks based on distributed hash tables (DHTs). We identify performance limitations in this context, and propose an array of t...
Serge Abiteboul, Ioana Manolescu, Neoklis Polyzoti...
AINA
2005
IEEE
14 years 2 months ago
3D-VOQ Switch Design and Evaluation
Input Buffered Switches with Virtual Output Queues(VOQ) design to avoid Head-Of-Line problems, is a primary design of switches that can be scalable to very high speeds. However, t...
Ding-Jyh Tsaur, Xian-Yang Lu, Chin-Chi Wu, Woei Li...