317 search results - page 10 / 64 » Scalable high performance main memory system using phase-cha... |
DAMON
2008
Springer
13 years 9 months ago
2008
Springer
A major performance bottleneck for database systems is the memory hierarchy. The performance of the memory hierarchy is directly related to how the content of disk pages maps to t...
ISCAS
1994
IEEE
13 years 11 months ago
1994
IEEE
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
ICC
2007
IEEE
14 years 2 months ago
2007
IEEE
1 Routers need buffers to store and forward packets, especially when there is network congestion. With current memory technology, neither the SRAM nor the DRAM alone is suitabl...