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ANCS
2007
ACM
13 years 11 months ago
Towards high-performance flow-level packet processing on multi-core network processors
There is a growing interest in designing high-performance network devices to perform packet processing at flow level. Applications such as stateful access control, deep inspection...
Yaxuan Qi, Bo Xu, Fei He, Baohua Yang, Jianming Yu...
ANCS
2010
ACM
13 years 5 months ago
sNICh: efficient last hop networking in the data center
: sNICh: Efficient Last Hop Networking in the Data Center Kaushik Kumar Ram, Jayaram Mudigonda, Alan L. Cox, Scott Rixner, Partha Ranganathan, Jose Renato Santos HP Laboratories H...
Kaushik Kumar Ram, Jayaram Mudigonda, Alan L. Cox,...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 5 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
VRML
2004
ACM
14 years 1 months ago
A VRML97-X3D extension for massive scenery management in virtual worlds
In this paper we present a VRML97-X3D extension to describe precomputed visibility relationships in the context of progressive transmission as well as real time visualization of m...
Jean-Eudes Marvie, Kadi Bouatouch
WWW
2003
ACM
14 years 8 months ago
Efficient URL caching for world wide web crawling
Crawling the web is deceptively simple: the basic algorithm is (a) Fetch a page (b) Parse it to extract all linked URLs (c) For all the URLs not seen before, repeat (a)?(c). Howev...
Andrei Z. Broder, Marc Najork, Janet L. Wiener