Sciweavers

434 search results - page 35 / 87
» Scalable synchronous queues
Sort
View
MICRO
2003
IEEE
132views Hardware» more  MICRO 2003»
14 years 3 months ago
Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors
Large instruction window processors achieve high performance by exposing large amounts of instruction level parallelism. However, accessing large hardware structures typically req...
Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasa...
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
12 years 9 days ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
SPAA
2010
ACM
14 years 2 months ago
Simplifying concurrent algorithms by exploiting hardware transactional memory
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
Dave Dice, Yossi Lev, Virendra J. Marathe, Mark Mo...
HOTOS
2007
IEEE
14 years 1 months ago
Is the Optimism in Optimistic Concurrency Warranted?
Optimistic synchronization allows concurrent execution of critical sections while performing dynamic conflict detection and recovery. Optimistic synchronization will increase perf...
Donald E. Porter, Owen S. Hofmann, Emmett Witchel
CEC
2008
IEEE
14 years 4 months ago
Decentralised distributed multiple objective particle swarm optimisation using peer to peer networks
—This paper describes a distributed particle swarm optimisation algorithm (PSO) based on peer-to-peer computer networks. A number of modifications are made to the more tradition...
Ian Scriven, Andrew Lewis, David Ireland, Junwei L...