433 search results - page 4 / 87 » Scale in Chip Interconnect requires Network Technology |
CNSR
2010
IEEE
13 years 10 months ago
2010
IEEE
— Buffered crossbar (CICQ) switches have shown a high potential in scaling Internet routers capacity. However, they require expensive on-chip buffers whose cost grows quadratical...
SLIP
2004
ACM
14 years 24 days ago
2004
ACM
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasingly important interconnect issues that the system designer must deal with. Recen...
ASPDAC
2009
ACM
14 years 1 months ago
2009
ACM
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
SLIP
2009
ACM
14 years 1 months ago
2009
ACM
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
SBACPAD
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...