87 search results - page 7 / 18 » Scaling Application Performance on a Cache-Coherent Multipro... |
ISVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper investigates the performance and power dissipation of Globally Asynchronous Locally Synchronous (GALS) multi-processor systems. We show that communication loops are a s...
ISCA
1993
IEEE
13 years 11 months ago
1993
IEEE
The distribution of resources among processors, memory and caches is a crucial question faced by designers of large-scale parallel machines. If a machine is to solve problems with...
LCR
1998
Springer
13 years 11 months ago
1998
Springer
Abstract. This paper gives an overview of locality enhancement techniques used by the Jasmine compiler, currently under development at the University of Toronto. These techniques e...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
PPOPP
2003
ACM
14 years 22 days ago
2003
ACM
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...