Sciweavers

521 search results - page 49 / 105
» Scaling Soft Processor Systems
Sort
View
ICPP
2007
IEEE
14 years 2 months ago
Parallel Algorithms for Bayesian Indoor Positioning Systems
We present two parallel algorithms and their Unified Parallel C implementations for Bayesian indoor positioning systems. Our approaches are founded on Markov Chain Monte Carlo si...
Konstantinos Kleisouris, Richard P. Martin
WEA
2005
Springer
176views Algorithms» more  WEA 2005»
14 years 1 months ago
High-Performance Algorithm Engineering for Large-Scale Graph Problems and Computational Biology
Abstract. Many large-scale optimization problems rely on graph theoretic solutions; yet high-performance computing has traditionally focused on regular applications with high degre...
David A. Bader
DATE
2006
IEEE
151views Hardware» more  DATE 2006»
14 years 1 months ago
Designing MRF based error correcting circuits for memory elements
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
CASES
2008
ACM
13 years 9 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
ASPLOS
2004
ACM
14 years 1 months ago
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
Power density in high-performance processors continues to increase with technology generations as scaling of current, clock speed, and device density outpaces the downscaling of s...
Mohamed A. Gomaa, Michael D. Powell, T. N. Vijayku...