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CCS
2011
ACM
12 years 7 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
MDM
2005
Springer
170views Communications» more  MDM 2005»
14 years 1 months ago
The role of caching and context-awareness in P2P service discovery
Mobile terminals (cellular phones, PDAs, palmtops etc.) emerge as a new class of small-scale, ad-hoc service providers that share data and functionality via mobile web services’...
Christos Doulkeridis, Vassilis Zafeiris, Michalis ...
IPPS
2006
IEEE
14 years 1 months ago
Early evaluation of the Cray XT3
Oak Ridge National Laboratory recently received delivery of a 5,294 processor Cray XT3. The XT3 is Cray’s third-generation massively parallel processing system. The system build...
Jeffrey S. Vetter, Sadaf R. Alam, Thomas H. Duniga...
HPCA
2009
IEEE
14 years 8 months ago
Variation-aware dynamic voltage/frequency scaling
Fine-grained dynamic voltage/frequency scaling (DVFS) is an important tool in managing the balance between power and performance in chip-multiprocessors. Although manufacturing pr...
Sebastian Herbert, Diana Marculescu
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 2 months ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...