86 search results - page 15 / 18 » Scaling and Packing on a Chip Multiprocessor |
ISQED
2010
IEEE
13 years 6 months ago
2010
IEEE
Multiple use-case chip multiprocessor (CMP) applications require adaptive on-chip communication fabrics to cope with changing use-case performance needs. Networks-on-chip (NoC) ha...
TPDS
2010
13 years 2 months ago
2010
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...
ASPLOS
2004
ACM
14 years 29 days ago
2004
ACM
Power density in high-performance processors continues to increase with technology generations as scaling of current, clock speed, and device density outpaces the downscaling of s...
CASES
2009
ACM
14 years 2 months ago
2009
ACM
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...