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CODES
2006
IEEE
14 years 1 months ago
Floorplan driven leakage power aware IP-based SoC design space exploration
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...
COMSWARE
2006
IEEE
14 years 1 months ago
Architecture and framework for supporting open-access multi-user wireless experimentation
—Most of the contemporary research in wireless networks is primarily based on simulations or in-house small scale experimental setups that are highly customized for the experimen...
Sachin Ganu, Maximilian Ott, Ivan Seskar, Dipankar...
DATE
2006
IEEE
158views Hardware» more  DATE 2006»
14 years 1 months ago
Modeling multiple input switching of CMOS gates in DSM technology using HDMR
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
Jayashree Sridharan, Tom Chen
IPPS
2006
IEEE
14 years 1 months ago
MegaProto/E: power-aware high-performance cluster with commodity technology
In our research project named “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, we have been developing a prototype cluster not based on ASIC or FPGA...
Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi, H...
SSDBM
2006
IEEE
153views Database» more  SSDBM 2006»
14 years 1 months ago
HDF5-FastQuery: Accelerating Complex Queries on HDF Datasets using Fast Bitmap Indices
Large scale scientific data is often stored in scientific data formats such as FITS, netCDF and HDF. These storage formats are of particular interest to the scientific user com...
Luke J. Gosink, John Shalf, Kurt Stockinger, Keshe...