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FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
12 years 11 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
ICCV
1999
IEEE
14 years 9 months ago
Single View Metrology
We describe how 3D affine measurements may be computed from a single perspective view of a scene given only minimal geometric information determined from the image. This minimal i...
Antonio Criminisi, Ian D. Reid, Andrew Zisserman
DAC
2004
ACM
14 years 8 months ago
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik...
ICML
2002
IEEE
14 years 8 months ago
Combining Labeled and Unlabeled Data for MultiClass Text Categorization
Supervised learning techniques for text classi cation often require a large number of labeled examples to learn accurately. One way to reduce the amountoflabeled datarequired is t...
Rayid Ghani
WWW
2008
ACM
14 years 8 months ago
Efficiently querying rdf data in triple stores
Efficiently querying RDF [1] data is being an important factor in applying Semantic Web technologies to real-world applications. In this context, many efforts have been made to st...
Ying Yan, Chen Wang, Aoying Zhou, Weining Qian, Li...