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IEEEPACT
2000
IEEE
14 years 1 months ago
Instruction Scheduling for Clustered VLIW DSPs
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
Rainer Leupers
HPCA
2003
IEEE
14 years 9 months ago
Hierarchical Backoff Locks for Nonuniform Communication Architectures
This paper identifies node affinity as an important property for scalable general-purpose locks. Nonuniform communication architectures (NUCAs), for example CCNUMAs built from a f...
Zoran Radovic, Erik Hagersten
ICMCS
2006
IEEE
146views Multimedia» more  ICMCS 2006»
14 years 3 months ago
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications
Numerous approaches can be employed in exploiting computation power in processors such as superscalar, VLIW, SMT and multi-core on chip. In this paper, a UniCore VisoMT processor ...
Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-He...
IWANN
2005
Springer
14 years 2 months ago
Co-evolutionary Learning in Liquid Architectures
A large class of problems requires real-time processing of complex temporal inputs in real-time. These are difficult tasks for state-of-the-art techniques, since they require captu...
Igal Raichelgauz, Karina Odinaev, Yehoshua Y. Zeev...
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
14 years 1 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...