1263 search results - page 138 / 253 » Scatter-Add in Data Parallel Architectures |
SAC
2009
ACM
14 years 4 months ago
2009
ACM
Parallel architectures are the way of the future, but are notoriously difficult to program. In addition to the low-level constructs they often present (e.g., locks, DMA, and non-...
AINA
2007
IEEE
14 years 3 months ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
SBACPAD
2005
IEEE
14 years 2 months ago
2005
IEEE
Clustered architectures which intend to process data within a localized PE are one of the approaches to increase the performance under the difficulties of the wire delay problems...
CASES
2003
ACM
14 years 2 months ago
2003
ACM
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
EUROPAR
2009
Springer
14 years 1 months ago
2009
Springer
In response to the constant increase in wire delays, Non-Uniform Cache Architecture (NUCA) has been introduced as an effective memory model for dealing with growing memory latenci...