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DSD
2006
IEEE
135views Hardware» more  DSD 2006»
14 years 21 days ago
Hardware-Software Codesign of a Vector Co-processor for Public Key Cryptography
Until now, most cryptography implementations on parallel architectures have focused on adapting the software to SIMD architectures initially meant for media applications. In this ...
Jacques J. A. Fournier, Simon W. Moore
CLUSTER
2004
IEEE
14 years 24 days ago
An efficient end-host architecture for cluster communication
Cluster computing environments built from commodity hardware have provided a cost-effective solution for many scientific and high-performance applications. Likewise, middleware te...
Xin Qi, Gabriel Parmer, Richard West
HPDC
1998
IEEE
14 years 1 months ago
High-Speed, Wide Area, Data Intensive Computing: A Ten Year Retrospective
Modern scientific computing involves organizing, moving, visualizing, and analyzing massive amounts of data from around the world, as well as employing largescale computation. The...
William E. Johnston
ICPPW
2005
IEEE
14 years 2 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
HPCA
1998
IEEE
14 years 1 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...