Sciweavers

1263 search results - page 93 / 253
» Scatter-Add in Data Parallel Architectures
Sort
View
HIPC
2009
Springer
13 years 7 months ago
Highly scalable algorithm for distributed real-time text indexing
Stream computing research is moving from terascale to petascale levels. It aims to rapidly analyze data as it streams in from many sources and make decisions with high speed and a...
Ankur Narang, Vikas Agarwal, Monu Kedia, Vijay K. ...
PPOPP
2009
ACM
14 years 10 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
DAC
2005
ACM
14 years 10 months ago
Locality-conscious workload assignment for array-based computations in MPSOC architectures
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
Feihui Li, Mahmut T. Kandemir
JSA
2006
67views more  JSA 2006»
13 years 9 months ago
Speedup of NULL convention digital circuits using NULL cycle reduction
A NULL Cycle Reduction (NCR) technique is developed to increase the throughput of NULL Convention Logic systems, by reducing the time required to flush complete DATA wavefronts, c...
S. C. Smith
ICPP
1999
IEEE
14 years 1 months ago
Parallel Media Processors for the Billion-Transistor Era
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...
Jason Fritts, Zhao Wu, Wayne Wolf