: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
- We present a software tool for high-level design and analysis of large-scale embedded real-time software, which has been integrated into a vehicle control platform development to...
Xiaofeng Yin, Daniel L. Kiskis, Daniel Mihalik, Ka...
This article introduces the Time Model subprofile of MARTE, a new OMG UML Profile dedicated to Modeling and Analysis of Real-Time and Embedded systems. After a brief presentatio...
Abstract— Performance analysis of multiuser orthogonal frequency division multiplexing (OFDM-TDMA) and orthogonal frequency division multiple access (OFDMA) networks in support o...
Fair queueing of rate and delay-sensitive packet flows in a shared-medium, multihop wireless network remains largely unaddressed because of the unique design issues such as locat...