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FCCM
2009
IEEE
134views VLSI» more  FCCM 2009»
13 years 11 months ago
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
Miaoqing Huang, Vikram K. Narayana, Tarek A. El-Gh...
GLOBECOM
2009
IEEE
13 years 11 months ago
Route Capacity Estimation Based Admission Control and QoS Routing for Mesh Networks
Wireless Mesh Networks (WMNs) is a promising key technology for next generation wireless backhauling that is expected to support various types of applications with different qualit...
Chi Harold Liu, Athanasios Gkelias, Kin K. Leung
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
13 years 11 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...
ATAL
2006
Springer
13 years 11 months ago
ACTIVE: agile coordinator testbed integrated virtual environment
This paper describes the specification, design and development of ACTIVE, a testbed for the testing and simulation of large-scale agent-based systems. ACTIVE is being developed as...
G. Emami, J. Cheng, D. Cornwell, M. Feldhousen, C....
CODES
2004
IEEE
13 years 11 months ago
Tuning SoC platforms for multimedia processing: identifying limits and tradeoffs
We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing m...
Alexander Maxiaguine, Yongxin Zhu, Samarjit Chakra...