Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
Reader preference, writer preference, and task-fair readerwriter locks are shown to cause undue blocking in multiprocessor real-time systems. A new phase-fair reader-writer lock i...
In order to meet performance/low energy/integration requirements, parallel architectures (multithreaded cores and multi-cores) are more and more considered in the design of embedd...
Energy-efficient computing as a research area has been receiving increasing attention in recent years due to rising energy costs and environmental awareness. In this paper, we pre...
Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energ...