70 search results - page 14 / 14 » Scheduling Real-Time Components Using Jitter-Constrained Str... |
COBUILD
1999
Springer
14 years 2 months ago
1999
Springer
This paper discusses our implementation and experience with a camera-based whiteboard scanner. The ZombieBoard system (so called because it brings to electronic life the marks on a...
DATE
2003
IEEE
14 years 3 months ago
2003
IEEE
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
CCGRID
2010
IEEE
13 years 11 months ago
2010
IEEE
Abstract--Multi-core processors with accelerators are becoming commodity components for high-performance computing at scale. While accelerator-based processors have been studied in...
IPPS
2009
IEEE
14 years 4 months ago
2009
IEEE
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...
HPCA
2012
IEEE
12 years 5 months ago
2012
IEEE
Main memory latencies have always been a concern for system performance. Given that reads are on the critical path for CPU progress, reads must be prioritized over writes. However...