325 search results - page 15 / 65 » Secure Configuration of Field Programmable Gate Arrays |
FPL
2005
Springer
14 years 1 months ago
2005
Springer
This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit...
CANPC
1999
Springer
13 years 11 months ago
1999
Springer
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
CSREAESA
2010
13 years 5 months ago
2010
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...
FPGA
1997
ACM
13 years 11 months ago
1997
ACM
Process technology advances tell us that the one-million gate Field-Programmable Gate Array (FPGA) will soon be here, and larger devices shortly after that. We feel that current a...
DFT
2005
IEEE
14 years 1 months ago
2005
IEEE
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...