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» Secure Configuration of Field Programmable Gate Arrays
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IPPS
1999
IEEE
13 years 11 months ago
Solving Satisfiability Problems on FPGAs using Experimental Unit Propagation Heuristic
This paperpresents new resultson anapproach for solvingsatisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field ...
Takayuki Suyama, Makoto Yokoo, Akira Nagoya
DAC
2007
ACM
14 years 8 months ago
Enhancing FPGA Performance for Arithmetic Circuits
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Par...
ACST
2006
13 years 9 months ago
A combinatorial group testing method for FPGA fault location
Adaptive fault isolation methods based on discrepancyenabled pairwise comparisons are developed for reconfigurable logic devices. By observing the discrepancy characteristics of m...
Carthik A. Sharma, Ronald F. DeMara
AHS
2007
IEEE
231views Hardware» more  AHS 2007»
14 years 1 months ago
Debug Support for Hybrid SoCs
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid syst...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
CSREAESA
2009
13 years 8 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud