1210 search results - page 11 / 242 » Secure Logic Synthesis |
FOSAD
2000
Springer
13 years 11 months ago
2000
Springer
ISSE
2010
13 years 6 months ago
2010
LOPSTR
2000
Springer
13 years 11 months ago
2000
Springer
In this paper we will present a formal framework, based on the notion of extraction calculus, which has been successfully applied to define procedures for extracting information fr...
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
DATE
2010
IEEE
14 years 19 days ago
2010
IEEE
Abstract—We propose a novel synthesis technique for reversible logic based on ant colony optimization (ACO). In our ACO-based approach, reversible logic synthesis is formulated a...