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CODES
2003
IEEE
14 years 2 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
IPPS
2007
IEEE
14 years 3 months ago
Design Alternatives for a High-Performance Self-Securing Ethernet Network Interface
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
Derek L. Schuff, Vijay S. Pai
DSN
2004
IEEE
14 years 14 days ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
CSFW
2010
IEEE
14 years 19 days ago
Towards a Formal Foundation of Web Security
—We propose a formal model of web security based straction of the web platform and use this model to analyze the security of several sample web mechanisms and applications. We id...
Devdatta Akhawe, Adam Barth, Peifung E. Lam, John ...