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FPL
2004
Springer
143views Hardware» more  FPL 2004»
14 years 9 days ago
Exploring Area/Delay Tradeoffs in an AES FPGA Implementation
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...
Joseph Zambreno, David Nguyen, Alok N. Choudhary
FPL
2003
Springer
114views Hardware» more  FPL 2003»
14 years 1 months ago
Power Analysis of FPGAs: How Practical is the Attack?
Recent developments in information technologies made the secure transmission of digital data a critical design point. Large data flows have to be exchanged securely and involve en...
François-Xavier Standaert, Loïc van Ol...
ACNS
2009
Springer
123views Cryptology» more  ACNS 2009»
14 years 3 months ago
Practical Secure Evaluation of Semi-private Functions
Abstract. Two-party Secure Function Evaluation (SFE) is a very useful cryptographic tool which allows two parties to evaluate a function known to both parties on their private (sec...
Annika Paus, Ahmad-Reza Sadeghi, Thomas Schneider
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
14 years 1 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
DAC
2005
ACM
14 years 9 months ago
Simulation models for side-channel information leaks
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
Kris Tiri, Ingrid Verbauwhede