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ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
14 years 2 months ago
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
Hao Yu, Yiyu Shi, Lei He, Tanay Karnik
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
14 years 2 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
EGC
2005
Springer
14 years 2 months ago
Transparent Fault Tolerance for Grid Applications
A major challenge facing grid applications is the appropriate handling of failures. In this paper we address the problem of making parallel Java applications based on Remote Method...
Pawel Garbacki, Bartosz Biskupski, Henri E. Bal
ESTIMEDIA
2005
Springer
14 years 2 months ago
Custom Processor Design Using NISC: A Case-Study on DCT algorithm
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
Bita Gorjiara, Daniel D. Gajski
EUC
2005
Springer
14 years 2 months ago
Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs
Abstract. Loop distribution and loop fusion are two effective loop transformation techniques to optimize the execution of the programs in DSP applications. In this paper, we propo...
Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, M...