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ISPD
2004
ACM
161views Hardware» more  ISPD 2004»
14 years 1 months ago
Early-stage power grid analysis for uncertain working modes
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
ITC
2003
IEEE
134views Hardware» more  ITC 2003»
14 years 26 days ago
Effectiveness Improvement of ECR Tests
Energy Consumption Ratio (ECR) test, a current-based test, has shown its ability to reduce the impact of process variations and detect hard-to-detect faults. The effectiveness of ...
Wanli Jiang, Erik Peterson, Bob Robotka
ITC
1997
IEEE
80views Hardware» more  ITC 1997»
13 years 11 months ago
Scan Synthesis for One-Hot Signals
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...
Subhasish Mitra, LaNae J. Avra, Edward J. McCluske...
ATS
2009
IEEE
92views Hardware» more  ATS 2009»
13 years 5 months ago
M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay
Negative bias temperature instability (NBTI) has been a significant reliability concern in current digital circuit design due to its effect of increasing the path delay with time a...
Song Jin, Yinhe Han, Lei Zhang 0008, Huawei Li, Xi...
IPPS
2007
IEEE
14 years 1 months ago
Linking Compilation and Visualization for Massively Parallel Programs
This paper presents a technique to visualize the communication pattern of a parallel application at different points during its execution. Unlike many existing tools that show the...
Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, ...