First-in first-out (FIFO) memories are widely used in SoC for data buffering and flow control. In this paper, a robust ultra-low power asynchronous FIFO memory is proposed. With s...
This paper presents several new asynchronous FIFO designs. While most existing FIFO’s trade higher throughput for higher latency, our goal is to achieve very low latency while m...
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
For simulating physical and chemical processes on molecular level asynchronous cellular automata with probabilistic transition rules are widely used being sometimes referred to as ...
Modern approaches to treating genetic disorders, cancers and even epidemics rely on a detailed understanding of the underlying gene signaling network. Previous work has used time s...
David Oviatt, Mark J. Clement, Quinn Snell, Kennet...