605 search results - page 104 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
FPGA
2008
ACM
13 years 10 months ago
2008
ACM
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
Using alternative cache indexing/hashing functions is a popular technique to reduce conflict misses by achieving a more uniform cache access distribution across the sets in the ca...
ICCV
2009
IEEE
15 years 1 months ago
2009
IEEE
We present a novel keyframe selection and recognition
method for robust markerless real-time camera tracking.
Our system contains an ofine module to select features
from a grou...
SIGGRAPH
1999
ACM
14 years 22 days ago
1999
ACM
Bus traffic between the graphics subsystem and memory can become a bottleneck when rendering geometrically complex meshes. In this paper, we investigate the use of vertex caching...
DAGSTUHL
2006
13 years 9 months ago
2006
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...