This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing systems. There are two major challenges that need to be considered by this framework. The first is how to manage the wires crossing a core's borders. The second is how to maintain an acceptable level of flexibility for system construction with only a minimum of overhead. The perceived advantages of full independent core development are weighed against the loss in placement flexibility and elimination of the opportunities to optimise a system across cores. Few existing methodologies allow the independent compilation of FPGA cores through every step of the design flow. In this paper we analyse the wire detail of modern FPGA architectures to determine how the interconnect architecture effects the shape of pre-routed cores and the wire bandwidth available to interfaces. We have adapted academic placement and r...
Douglas L. Maskell, Timothy F. Oliver