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VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
14 years 11 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
SSDBM
2000
IEEE
155views Database» more  SSDBM 2000»
14 years 3 months ago
Knowledge-Based Integration of Neuroscience Data Sources
The need for information integration is paramount in many biological disciplines, because of the large heterogeneity in both the types of data involved and in the diversity of app...
Amarnath Gupta, Bertram Ludäscher, Maryann E....
IFM
1999
Springer
14 years 3 months ago
Retrenchment and Punctured Simulation
: Some of the shortcomings of using refinement alone as the means of passing from high level simple models to actual detailed implementations are reviewed. Retrenchment is presente...
Richard Banach, Michael Poppleton
AIPS
2008
14 years 1 months ago
A Temporal Logic-Based Planning and Execution Monitoring System
As no plan can cover all possible contingencies, the ability to detect failures during plan execution is crucial to the robustness of any autonomous system operating in a dynamic ...
Jonas Kvarnström, Fredrik Heintz, Patrick Doh...
ECMDAFA
2005
Springer
125views Hardware» more  ECMDAFA 2005»
14 years 4 months ago
Making Metamodels Aware of Concrete Syntax
Language-centric methodologies, triggered by the success of Domain Specific Languages, rely on precise specifications of modeling s. While the definition of the abstract syntax ...
Frédéric Fondement, Thomas Baar