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» Sequential Verification of Serializability
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CAV
2009
Springer
209views Hardware» more  CAV 2009»
14 years 8 months ago
Static and Precise Detection of Concurrency Errors in Systems Code Using SMT Solvers
Context-bounded analysis is an attractive approach to verification of concurrent programs. Bounding the number of contexts executed per thread not only reduces the asymptotic compl...
Shuvendu K. Lahiri, Shaz Qadeer, Zvonimir Rakamari...
FMCAD
2008
Springer
13 years 9 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
FMCAD
2006
Springer
13 years 11 months ago
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning
Pervasive Logic is a broad term applied to the variety of logic present in hardware designs, yet not a part of their primary functionality. Examples of pervasive logic include init...
Tilman Glökler, Jason Baumgartner, Devi Shanm...
PAMI
2008
146views more  PAMI 2008»
13 years 7 months ago
Optimal Randomized RANSAC
A randomized model verification strategy for RANSAC is presented. The proposed method finds, like RANSAC, a solution that is optimal with user-specified probability. The solution i...
Ondrej Chum, Jiri Matas
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 4 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna