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ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
12 years 16 days ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
SIGOPS
2008
100views more  SIGOPS 2008»
13 years 8 months ago
Power management in the EPOS system
Power management strategies for embedded systems typically rely on static, application driven deactivation of components (e.g. sleep, suspend), or on dynamic voltage and frequency...
Geovani Ricardo Wiedenhoft, Lucas Francisco Wanner...
INFOCOM
2012
IEEE
12 years 16 days ago
Spectrum management and power allocation in MIMO cognitive networks
Cognitive radio (CR) techniques improve the spectrum utilization by exploiting temporarily-free frequency bands (i.e., in the time domain). The spectrum utilization can be boosted...
Diep N. Nguyen, Marwan Krunz
VLSID
2009
IEEE
108views VLSI» more  VLSID 2009»
14 years 10 months ago
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....
Forrest Brewer, João Pedro Hespanha, Nitin ...
CODES
2011
IEEE
12 years 10 months ago
Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends
Designing memory controllers for complex real-time and highperformance multi-processor systems-on-chip is challenging, since sufficient capacity and (real-time) performance must b...
Benny Akesson, Po-Chun Huang, Fabien Clermidy, Den...