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PADS
1996
ACM
13 years 11 months ago
Conservative Circuit Simulation on Shared-Memory Multiprocessors
We investigate conservative parallel discrete event simulations for logical circuits on shared-memory multiprocessors. For a first estimation of the possible speedup, we extend th...
Jörg Keller, Thomas Rauber, Bernd Rederlechne...
TC
1998
13 years 7 months ago
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
Fredrik Dahlgren, Michel Dubois, Per Stenströ...
ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
14 years 14 days ago
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, ...
HPCA
1998
IEEE
13 years 11 months ago
Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...
Ye Zhang, Lawrence Rauchwerger, Josep Torrellas
SC
1995
ACM
13 years 11 months ago
Architectural Mechanisms for Explicit Communication in Shared Memory Multiprocessors
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
Umakishore Ramachandran, Gautam Shah, Anand Sivasu...