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DATE
2005
IEEE
135views Hardware» more  DATE 2005»
14 years 2 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
GRID
2004
Springer
14 years 2 months ago
Memory Conscious Task Partition and Scheduling in Grid Environments
While resource management and task scheduling are identified challenges of Grid computing, current Grid scheduling systems mainly focus on CPU and network availability. Recent per...
Ming Wu, Xian-He Sun
EUROSYS
2007
ACM
14 years 6 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
PDP
2005
IEEE
14 years 2 months ago
A Comparison Study of the HLRC-DU Protocol versus a HLRC Hardware Assisted Protocol
SVM systems are a cheaper and flexible way to implement the shared memory programming paradigm. Their huge flexibility is due to their software implementation; however, this is al...
Salvador Petit, Julio Sahuquillo, Ana Pont
IJHPCN
2006
106views more  IJHPCN 2006»
13 years 9 months ago
Performance evaluation of the Sun Fire Link SMP clusters
As symmetric multiprocessors become commonplace, the interconnection networks and the communication system software in clusters of multiprocessors become critical to achieving high...
Ying Qian, Ahmad Afsahi, Nathan R. Fredrickson, Re...