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ICCCN
2008
IEEE
14 years 3 months ago
Impact of Network Sharing in Multi-Core Architectures
As commodity components continue to dominate the realm of high-end computing, two hardware trends have emerged as major contributors—high-speed networking technologies and multi...
G. Narayanaswamy, Pavan Balaji, Wu-chun Feng
TC
2010
13 years 3 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
LCTRTS
2009
Springer
14 years 3 months ago
Software transactional memory for multicore embedded systems
Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpos...
Jennifer Mankin, David R. Kaeli, John Ardini
ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
14 years 1 months ago
Memory Forwarding: Enabling Aggressive Layout Optimizations by Guaranteeing the Safety of Data Relocation
By optimizing data layout at run-time, we can potentially enhance the performance of caches by actively creating spatial locality, facilitating prefetching, and avoiding cache con...
Chi-Keung Luk, Todd C. Mowry
ISPASS
2008
IEEE
14 years 3 months ago
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
Lee Baugh, Craig B. Zilles