41 search results - page 5 / 9 » Short-Circuit Compiler Transformation: Optimizing Conditiona... |
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
ISHPC
2003
Springer
14 years 21 days ago
2003
Springer
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
ICMCS
2006
IEEE
14 years 1 months ago
2006
IEEE
Blocking artifact is the most prevailing degradation caused by block-based DCT coding techniques under low bit-rate conditions. To alleviate blockings perceptually, it is desirabl...
MICRO
1993
IEEE
13 years 11 months ago
1993
IEEE
Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed by all execution scenarios in the program. H...
IEEECIT
2010
IEEE
13 years 6 months ago
2010
IEEE
—Superblocks represent regions in a program code that consist of multiple basic blocks. Compilers benefit from this structure since it enables optimization across block boundari...