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ARC
2010
Springer
167views Hardware» more  ARC 2010»
14 years 6 days ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley
ICDE
2005
IEEE
118views Database» more  ICDE 2005»
14 years 10 months ago
Bypass Caching: Making Scientific Databases Good Network Citizens
Scientific database federations are geographically distributed and network bound. Thus, they could benefit from proxy caching. However, existing caching techniques are not suitabl...
Tanu Malik, Randal C. Burns, Amitabh Chaudhary
DSD
2004
IEEE
169views Hardware» more  DSD 2004»
14 years 19 days ago
Shift Invert Coding (SINV) for Low Power VLSI
Low power VLSI circuit design is one of the most important issues in present day technology. One of the ways of reducing power in a CMOS circuit is to reduce the number of transit...
Jayapreetha Natesan, Damu Radhakrishnan
BNCOD
2003
104views Database» more  BNCOD 2003»
13 years 10 months ago
External Sorting with On-the-Fly Compression
Evaluating a query can involve manipulation of large volumes of temporary data. When the volume of data becomes too great, activities such as joins and sorting must use disk, and ...
John Yiannis, Justin Zobel
ISHPC
2003
Springer
14 years 2 months ago
Distribution-Insensitive Parallel External Sorting on PC Clusters
There have been many parallel external sorting algorithms reported such as NOW-Sort, SPsort, and hill sort, etc. They are for sorting large-scale data stored in the disk, but they ...
Minsoo Jeon, Dongseung Kim