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IEEEPACT
2007
IEEE
14 years 1 months ago
A Flexible Heterogeneous Multi-Core Architecture
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
Miquel Pericàs, Adrián Cristal, Fran...
DEBU
2010
128views more  DEBU 2010»
13 years 4 months ago
Designing Database Operators for Flash-enabled Memory Hierarchies
Flash memory affects not only storage options but also query processing. In this paper, we analyze the use of flash memory for database query processing, including algorithms that...
Goetz Graefe, Stavros Harizopoulos, Harumi A. Kuno...
3DIM
2007
IEEE
14 years 7 months ago
Automatic Pose Estimation for Range Images on the GPU
Object pose (location and orientation) estimation is a common task in many computer vision applications. Although many methods exist, most algorithms need manual initialization ...
Marcel Germann, Michael D. Breitenstein, In Kyu Pa...
CISS
2008
IEEE
14 years 1 months ago
Distributed processing in frames for sparse approximation
—Beyond signal processing applications, frames are also powerful tools for modeling the sensing and information processing of many biological and man-made systems that exhibit in...
Christopher J. Rozell
ISORC
2008
IEEE
14 years 1 months ago
Hardware Objects for Java
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
Martin Schoeberl, Christian Thalinger, Stephan Kor...