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ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 8 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
CGF
2008
125views more  CGF 2008»
13 years 8 months ago
Interactive Visualization for Memory Reference Traces
We present the Memory Trace Visualizer (MTV), a tool that provides interactive visualization and analysis of the sequence of memory operations performed by a program as it runs. A...
A. N. M. Imroz Choudhury, Kristin C. Potter, Steve...
JEI
2006
162views more  JEI 2006»
13 years 8 months ago
Markovian segmentation and parameter estimation on graphics hardware
In this paper, we show how Markovian strategies used to solve well-known segmentation problems such as motion estimation, motion detection, motion segmentation, stereovision, and c...
Pierre-Marc Jodoin, Max Mignotte
SP
2002
IEEE
129views Security Privacy» more  SP 2002»
13 years 8 months ago
The XCAT Science Portal
The design and prototype implementation of the XCAT Grid Science Portal is described in this paper. The portal lets grid application programmers easily script complex distributed ...
Sriram Krishnan, Randall Bramley, Dennis Gannon, R...
FPL
2010
Springer
139views Hardware» more  FPL 2010»
13 years 6 months ago
Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA
A Multivariate Gaussian random number generator (MVGRNG) is an essential block for many hardware designs, including Monte Carlo simulations. These simulations are usually used in a...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...