657 search results - page 19 / 132 » Simulating Student Programmers |
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
—A simple low-area and low-power clock frequency multiplier is proposed for Delay Locked Loop (DLL) based clock synthesizers. In this circuit, 2n voltage controlled delay lines (...
EGH
2003
Springer
14 years 1 months ago
2003
Springer
We show how a future graphics processor unit (GPU), enhanced with random read and write to video memory, can represent, refine and adjust complex meshes arising in modeling, simu...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
Abstract { This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation descripti...
FCCM
2007
IEEE
14 years 2 months ago
2007
IEEE
— Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. This p...
FPL
2006
Springer
14 years 3 days ago
2006
Springer
This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Speci...