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VTS
1999
IEEE
83views Hardware» more  VTS 1999»
14 years 23 days ago
PADded Cache: A New Fault-Tolerance Technique for Cache Memories
This paper presents a new fault-tolerance technique for cache memories. Current fault-tolerance techniques for caches are limited either by the number of faults that can be tolera...
Philip P. Shirvani, Edward J. McCluskey
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
14 years 7 days ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
FPGA
2008
ACM
191views FPGA» more  FPGA 2008»
13 years 10 months ago
A hardware framework for the fast generation of multiple long-period random number streams
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality ps...
Ishaan L. Dalal, Deian Stefan
ERSA
2007
142views Hardware» more  ERSA 2007»
13 years 10 months ago
An FPGA Implementation of Reciprocal Sums for SPME
Molecular Dynamics simulations have become an interesting target for acceleration using Field-Programmable Gate Arrays (FPGA). Still to be attempted completely in FPGA hardware is...
Sam Lee, Paul Chow
MODELLIERUNG
2008
13 years 10 months ago
Domain-Specific Languages for Wireless Sensor Networks
The development of software for wireless sensor networks is involved and complex. This does not only impose much work on programmers but also prevents domain experts from directly ...
Daniel A. Sadilek